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  Outline of automation

  The following outline is provided as an overview of and topical guide to automation: Automation – use of control systems and information technologies to reduce the need for human work in the production of goods and services. In the scope of industrialization, automation is a step beyond mechanization. == Essence of automation == Control system – a device, or set of devices to manage, command, direct or regulate the behavior of other devices or systems. Industrial control system (ICS) – encompasses several types of control systems used in industrial production, including supervisory control and data acquisition (SCADA) systems, distributed control systems (DCS), and other smaller control system configurations such as skid-mounted programmable logic controllers (PLC) often found in industrial sectors and critical infrastructures. Industrialization – period of social and economic change that transforms a human group from an agrarian society into an industrial one. Numerical control (NC) – refers to the automation of machine tools that are operated by abstractly programmed commands encoded on a storage medium, as opposed to controlled manually via handwheels or levers, or mechanically automated via cams alone. Robotics – the branch of technology that deals with the design, construction, operation, structural disposition, manufacture and application of robots and computer systems for their control, sensory feedback, and information processing. == Branches of automation == === General purpose === Autonomous automation – autonomous software agents to adapt the controllers of computer controlled industrial machinery and processes Banking automation Broadcast automation Building automation – advanced functionality provided by the control system of a building. A building automation system (BAS) is an example of a distributed control system. Home automation – control system of a home. Office automation – the varied computer machinery and software used to digitally create, collect, store, manipulate, and relay office information needed for accomplishing basic tasks such as business process automation and robotic process automation. Console automation Database automation Integrated library system Laboratory automation === Specific purpose === Automated attendant Automated guided vehicle Autonomous mobile robot Automated highway system Automated pool cleaner Automated teller machine Automatic painting (robotic) Pop music automation Remotely operated vehicle Robotic lawn mower Telephone switchboard Vending machine == Fields contributing to automation == Cybernetics – the interdisciplinary study of the structure of regulatory systems. Cognitive science – interdisciplinary scientific study of the mind and its processes. It examines what cognition is, what it does and how it works. Robotics – the branch of technology that deals with the design, construction, operation, structural disposition, manufacture and application of robots and computer systems for their control, sensory feedback, and information processing. == History of automation == History of mass production – Prerequisites of mass production were interchangeable parts, machine tools and power, especially in the form of electricity. Mass production was popularized in the 1910s and 1920s by Henry Ford's Ford Motor Company, which introduced electric motors to the then-well-known technique of chain or sequential production. History of home automation == Automated machines == Machine to Machine OLE for process control (OPC) Process control – a statistics and engineering discipline that deals with architectures, mechanisms and algorithms for maintaining the output of a specific process within a desired range. Run Book Automation (RBA) Robot – a mechanical or virtual intelligent agent that can perform tasks automatically or with guidance, typically by remote control. == Automated machine components == Artificial intelligence – the intelligence of machines and the branch of computer science that aims to create it. Friendly artificial intelligence – an artificial intelligence that has a positive rather than negative effect on humanity, and the field of knowledge required to build such an artificial intelligence. === Automation tools === Artificial neural network (ANN) – mathematical model or computational model that is inspired by the structure or functional aspects of biological neural networks. Human machine interface (HMI) – operator level local control panel that monitors field devices Laboratory information management system (LIMS) – software package that offers a set of key features that support a modern laboratory's operations. Industrial control system – encompasses several types of control systems used in industrial production, including supervisory control and data acquisition (SCADA) systems, distributed control systems (DCS), and other smaller control system configurations such as skid-mounted programmable logic controllers (PLC) often found in the industrial sectors and critical infrastructures. Distributed control system (DCS) – control system usually of a manufacturing system, process or any kind of dynamic system, in which the controller elements are not central in location (like the brain) but are distributed throughout the system with each component sub-system controlled by one or more controllers. Manufacturing execution system (MES) – system that manages manufacturing operations in a factory, including management of resources, scheduling production processes, dispatching production orders, execution of production orders, etc. Programmable automation controller (PAC) – digital computer used for automation of electromechanical processes, such as control of machinery on factory assembly lines, amusement rides, or light fixtures. Programmable logic controller (PLC)A Programmable Logic Controller, PLC or Programmable Controller is a digital computer used for automation of electromechanical processes, such as control of machinery on factory assembly lines, amusement rides, or light fixtures. The abbreviation "PLC" and the term "Programmable Logic Controller" are registered trademarks of the Allen-Bradley Company (Rockwell Automation). PLCs are used in many industries and machines. Unlike general-purpose computers, the PLC is designed for multiple inputs and output arrangements, extended temperature ranges, immunity to electrical noise, and resistance to vibration and impact. Programs to control machine operation are typically stored in battery-backed-up or non-volatile memory. A PLC is an example of a hard real time system since output results must be produced in response to input conditions within a limited time, otherwise unintended operation will result. Supervisory control and data acquisition (SCADA) – generally refers to industrial control systems (ICS): computer systems that monitor and control industrial, infrastructure, or facility-based processes, as described below: Industrial processes include those of manufacturing, production, power generation, fabrication, and refining, and may run in continuous, batch, repetitive, or discrete modes. Simulation § Engineering Technology simulation or Process simulation == Social movements == Automation-related social movement – a movement that advocates semi- or fully automatic systems to provide for human needs globally. For example, automation of farming and food distribution throughout the world so that no one will go hungry. One goal is to automate all mundane labor, to free humans to engage in more creative activities (or less work). The Technocracy movement – social movement active from the Great Depression (1930s) to date that proposes replacing politicians and business people with scientists and engineers who have the technical expertise to manage the economy. The Zeitgeist Movement – movement advocating the replacement of the market economy with an economy in which all resources are equitably, commonly and sustainably shared. == Automation in the future == Android – a robot or synthetic organism designed to look and act like a human, and with a body having a flesh-like resemblance Technological singularity – the hypothetical future emergence of greater-than-human intelligence through technological means Semi-automation – using a centralized computer controller to orchestrate the activities of man and machine. == Automation-related publications == IEEE Spectrum – the flagship publication of the Institute of Electrical and Electronics Engineers (IEEE), explores the development, applications and implications of new technologies, and provides a forum for understanding, discussion and leadership in these areas. IEEE Transactions on Information Theory – peer-reviewed scientific journal published by the Institute of Electrical and Electronics Engineers (IEEE), focused on the study of information theory, the mathematics of communications, including computer communications, robotics communications, etc. IEEE Transactions on Control S

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  Vacuum tube characteristics

  Vacuum tube characteristics (also called tube curves, valve characteristics or valve curves) describes the electrical relationships between electrode voltages and currents in a vacuum tube. These relationships are commonly presented as characteristic curves in tube manuals and engineering references. The curves typically show plate current versus plate voltage for several fixed control-grid voltages, showing how current varies with electrode potentials under controlled conditions. Designers use them to select operating points, determine voltage gain, estimate output power, and construct graphical load-line analyses. The use of characteristic curves as an engineering tool for analyzing vacuum-tube operation was established in the 1910s, notably in work by Edwin Howard Armstrong. Examples of such curves appear in early tube manuals and textbooks and form the basis of classical vacuum-tube circuit design. Different types of vacuum tubes are characterized using plots appropriate to their electrode structure and intended use. Two-electrode devices such as diodes are described primarily by the relation between plate voltage and plate current. Amplifying tubes containing control grids, such as triodes, tetrodes, pentodes, and beam tetrodes, are represented by families of curves measured for different grid voltages. From these families additional parameters such as amplification factor (μ), transconductance (gm), and plate resistance (rp) may be obtained. Although these plots are used primarily for circuit design, their shapes arise from the underlying physics of electron flow in vacuum tubes. The physical principles responsible for the observed characteristics are discussed in later sections. == 3/2 power law == In high-vacuum thermionic diodes operating under normal conditions, plate current increases nonlinearly with plate voltage. Over the space-charge-limited region, the current is well approximated by the three-halves power relation I p = P ⋅ V p 3 / 2 {\displaystyle I_{p}=P\cdot V_{p}^{3/2}} where P {\displaystyle P} is the perveance of the tube. Perveance is determined primarily by electrode geometry, including cathode area and cathode-to-plate spacing. It provides a practical measure of current-producing capability and is often used in tube manuals in place of a complete family of plate-characteristic curves. == Signal diode characterization == For small-signal diodes, tube manuals typically publish a single static anode characteristic showing anode current (Ia) as a function of anode voltage (Va), measured with the heater operating at its rated voltage. Because the diode contains no control grid, only one such I–V curve is required. The low-voltage portion of the curve is particularly important in detector service, where the nonlinear curvature of the current–voltage relation allows a small alternating signal to produce a net direct-current output, resulting in rectification. In addition to the static characteristic, tube manuals specify heater ratings, maximum plate voltage, permissible average current, and interelectrode capacitance. These parameters define the allowable operating region and high-frequency behavior. Another typical data sheet for a diode is for the Philips EB91 double diode. This book includes curves of the diode response in use as a detector. The output voltage is non-zero for an input voltage of 0 due to the Edison effect. == Rectifier characterization == Vacuum-tube rectifiers intended for power-supply service are specified differently from signal diodes. Their data emphasize heater requirements, peak inverse voltage, maximum peak plate current, permissible DC output current for various filter configurations, and regulation characteristics. Rectifier tubes exhibit nonlinear voltage drop that increases with current. For limited operating ranges this behavior may be represented by an equivalent or effective series resistance corresponding to the local slope of the plate characteristic (dynamic plate resistance, dV/dI). Diode voltages can be determied by use of a graphical aide. In capacitor-input supplies, conduction occurs in pulses near the peaks of the AC waveform, producing peak currents substantially greater than the average DC load current. Data sheets therefore specify maximum peak plate current and permissible filter capacitance in addition to average DC ratings. Under varying load conditions, the supply voltage changes in accordance with the rectifier's nonlinear characteristic and effective impedance. == Triode characterization == === Early use === The systematic use of characteristic curves to explain and quantify vacuum-tube amplification was introduced by Edwin Howard Armstrong in 1914. Using measured plate voltage-current curves, Armstrong demonstrated the mechanism of triode amplification and clarified the operation of grid-leak detection. ==== Plate and transfer characteristics ==== Triode data sheets present families of plate characteristics showing plate current I p {\displaystyle I_{p}} as a function of plate voltage E p {\displaystyle E_{p}} for several fixed grid voltages E g {\displaystyle E_{g}} . From these curves the operating point, voltage gain, and load-line behavior may be determined graphically. In normal operation, plate current depends on both grid and plate voltage. Classical analysis shows that the characteristics for different grid voltages are similar in form and differ primarily by horizontal displacement. In triodes, plate current may be approximated by I p = k ( E g + E p μ ) 3 / 2 {\displaystyle I_{p}=k\left(E_{g}+{\frac {E_{p}}{\mu }}\right)^{3/2}} where E g {\displaystyle E_{g}} is the grid voltage, E p {\displaystyle E_{p}} the plate voltage, μ {\displaystyle \mu } the amplification factor, and k {\displaystyle k} a constant determined by the tube geometry.. The amplification factor μ represents the relative effectiveness of grid voltage compared with plate voltage in controlling current. It is fundamentally determined by structural dimensions, particularly grid-to-cathode spacing relative to plate-to-cathode spacing. ==== Small-signal parameters ==== Triodes are commonly characterized by three interrelated small-signal parameters: Amplification factor ( μ {\displaystyle \mu } ) — the change in plate voltage divided by the change in grid voltage at constant plate current: μ = ( ∂ E p ∂ E g ) I p {\displaystyle \mu =\left({\frac {\partial E_{p}}{\partial E_{g}}}\right)_{I_{p}}} Transconductance ( g m {\displaystyle g_{m}} ) — the change in plate current divided by the change in grid voltage at constant plate voltage: g m = ( ∂ I p ∂ E g ) E p {\displaystyle g_{m}=\left({\frac {\partial I_{p}}{\partial E_{g}}}\right)_{E_{p}}} Plate resistance ( r p {\displaystyle r_{p}} ) — the change in plate voltage divided by the change in plate current at constant grid voltage: r p = ( ∂ E p ∂ I p ) E g {\displaystyle r_{p}=\left({\frac {\partial E_{p}}{\partial I_{p}}}\right)_{E_{g}}} These parameters are related by μ = g m r p {\displaystyle \mu =g_{m}r_{p}} as shown in classical tube theory treatments. These parameters are obtained either from slopes of the characteristic curves or from tabulated operating-point data. ==== Comparison of ECC81, ECC82, and ECC83 ==== The ECC81, ECC82, and ECC83 (also known respectively as 12AT7, 12AU7, and 12AX7) are closely related dual triodes widely used in small-signal amplifier stages. Although similar in construction and envelope size, they differ significantly in electrical parameters due to differences in electrode spacing and grid structure. (Data representative of manufacturer specifications.) The ECC83 exhibits high μ {\displaystyle \mu } and high plate resistance, producing large voltage gain but relatively low current drive capability. The ECC82 has lower μ {\displaystyle \mu } and lower plate resistance, allowing greater current delivery and reduced voltage gain. The ECC81 occupies an intermediate position with comparatively high transconductance and moderate amplification factor. These differences arise primarily from variations in grid pitch, cathode area, and electrode spacing, which determine perveance and amplification factor. Although the external envelope is similar, the internal geometry governs the characteristic curves and small-signal parameters. == Tetrode (screen-grid) characterization == The screen-grid tube (tetrode) was developed primarily to reduce the electrostatic coupling between plate and control grid that limited gain and stability in radio-frequency triode amplifiers. In triodes, the grid–plate capacitance provides feedback from plate to grid, restricting obtainable gain and often requiring neutralization circuits such as those used in neutrodyne receivers. By inserting a positively biased screen grid between control grid and plate, this capacitive coupling is greatly reduced, permitting higher stable gain at radio frequencies. The screen grid, also known as the shield grid or grid 2 (to distinguish it from t

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  G7 Rapid Response Mechanism

  The G7 Rapid Response Mechanism (RRM) is an initiative introduced in the "Charlevoix Commitment on Defending Democracy from Foreign Threats", issued by the leaders of the Group of Seven (G7) countries—United States, Canada, Japan, United Kingdom, France, Germany and Italy—on June 9, 2018, during their summit in Charlevoix, Quebec. The RRM's mandate is to strengthen the coordination of G7 member countries, as well as "to identify and respond to diverse and evolving threats to our democracies, including through sharing information and analysis, and identifying opportunities for coordinated response" The G7 is an informal international intergovernmental economic organization that meets annually, whose members represent the seven wealthiest advanced economies in the world, as measured by the International Monetary Fund (IMF). == Constituents == The following countries and organisations are members and observers (associate members) of the G7 Rapid Response Mechanism: Australia Canada France Germany Italy Japan Netherlands New Zealand Poland Sweden United Kingdom United States European Union North Atlantic Treaty Organization == Mandate == The RRM was mandated to "strengthen coordination to prevent, thwart and respond to malign and evolving threats to G7 democracies." It "will share information and threat analysis related to various threats to democracy, and is an established mechanism to identify opportunities for coordinated response." According to the Institute for Research on Public Policy's Policy Options magazine, the "RRM initiative seeks to strengthen the leading democracies' coordination to identify and respond to diverse and evolving threats…including through sharing information and analysis, and identifying opportunities for a coordinated response." == Administration == The RRM initiative is led by Canada through Global Affairs Canada's Centre for International Digital Policy. Tara Denham, Director of the Centre for International Digital Policy at Global Affairs Canada, directed the team responsible for setting up the RRM Coordination Unit. Global Affairs Canada—the Department of Foreign Affairs, Trade and Development—is the federal Canadian ministry responsible for diplomatic and consular relations, international trade, and international development and humanitarian assistance. The Centre for International Digital Policy includes the Digital Inclusion Lab and the RRM. Denham is also the RRM's Canadian Focal Point. At a briefing on "the security and intelligence threats to elections" of the House of Commons Standing Committee on Access to Information, Privacy and Ethics, the chair Bob Zimmer (CPC), said that the 2019 general election "may be different" from past elections in Canada. as the "tools that were used to strengthen civic engagement are being used to undermine, disrupt and destabilize democracy." "Democracies around the world have entered a new era—an era of heightened threat and heightened vigilance—and 2019 will see a number of countries brace for volleys of attempted disruption: India, Australia, Ukraine, Switzerland, Belgium, the EU and, of course, Canada. Evidence has confirmed that the most recent Canadian general election, in 2015, was unencumbered by interference, although there were some relatively primitive attempts to disrupt, misinform and divide. These efforts were few in number and uncoordinated, and had no visible impact on the voter, either online or in line." Zimmer described the initiative's three pillars. "enhancing citizen preparedness" through the "digital citizen initiative" "improving organizational readiness" with national security and intelligence agencies supporting Elections Canada "ensure a comprehensive understanding of and response to any threats to Canada's democratic process." by establishing the Security and Intelligence Threats to Elections Task Force (SITE) which works as a team with the Communications Security Establishment (CSE), the Canadian Security Intelligence Service (CSIS), the Royal Canadian Mounted Police (RCMP), as well as Global Affairs Canada Zimmer said that as part of the third pillar, "We have activated the G7 rapid response mechanism, announced at the G7 leaders' summit in Charlevoix, to strengthen coordination among our G7 allies and to ensure that there is international collaboration and coordination in responding to foreign threats to democracy." == Background == === Charlevoix summit === The G7 met from June 8 to 9, 2018 during their summit at the Manoir Richelieu in Charlevoix, in La Malbaie, Quebec. The Charlevoix Summit was the 44th G7 summit. The group issued eight "Commitments" at the summit. They included: Commitment on Defending Democracy from Foreign Threats Commitment on Equality and Economic Growth Commitment to End Sexual and Gender-Based Violence, Abuse and Harassment in Digital Contexts Declaration on Quality Education for Girls, Adolescent Girls and Women in Developing Countries Commitment on Innovative Financing for Development. Prime Minister Justin Trudeau announced five themes for Canada's G7 presidency which began in January 2018. === Defending Democracy from Foreign Threats === "We commit to take concerted action in responding to foreign actors who seek to undermine our democratic societies and institutions, our electoral processes, our sovereignty and our security as outlined in the Charlevoix Commitment on Defending Democracy from Foreign Threats. We recognize that such threats, particularly those originating from state actors, are not just threats to G7 nations, but to international peace and security and the rules-based international order. We call on others to join us in addressing these growing threats by increasing the resilience and security of our institutions, economies and societies, and by taking concerted action to identify and hold to account those who would do us harm." They committed to "cooperate in defending democracies from foreign threats and establish a response mechanism for that purpose". "Democracy and the rules-based international order are increasingly being challenged by authoritarianism and the defiance of international norms. In particular, foreign actors seek to undermine our democratic societies and institutions, our electoral processes, our sovereignty and our security. These malicious, multi-faceted and ever-evolving tactics constitute a serious strategic threat which we commit to confront together, working with other governments that share our democratic values." The Charlevoix Commitment states that "foreign actors seek to undermine our democratic societies and institutions, our electoral processes, our sovereignty and our security. These malicious, multi-faceted and ever-evolving tactics constitute a serious strategic threat which we commit to confront together, working together with other governments that share our democratic values." The Charlevoix Summit resolved to "establish a G7 Rapid Response Mechanism to strengthen our coordination to identify and respond to diverse and evolving threats to our democracies, including through sharing information and analysis, and identifying opportunities for coordinated response." == Monitored elections == === 2019 European Parliament election === RRM Canada's comprehensive report on the 2019 European Parliament election analyzed open data "related to foreign interference during and leading up to the 2019 European Union Parliamentary Elections, May 23–26, 2019". RRM Canada did not find "significant evidence of state-based foreign interference, or any large-scale, organized and coordinated efforts by non-state actors". They did find that "national or international non-state actors" used tactics based on those used by the Russian sponsored Internet Research Agency (IRA) in previous elections, "such as the 2016 U.S. Elections". For example, blogs, webpages, and social media accounts on Twitter, Facebook and Reddit "were used to spread divisive and false information to damage and negatively impact social cohesion and trust in democratic processes and institutions" in coordinated networks of Facebook groups. === 2019 Alberta general election === RRM Canada's analyz report on the 2019 Alberta general election was intended to "identify any emerging tactics in foreign interference and draw lessons learned for the Canadian general elections scheduled to take place in October 2019." No foreign activity was detected, although the data revealed ""suspicious account creation pattern that is indicative of troll or bot activity". They found "automated inauthentic behaviour and trolling activities" but concluded that they were "very likely domestic". The data showed "suspicious account creation pattern that is indicative of troll or bot activity", and "spikes in account creation" which suggested the "presence of accounts developed for a specific purpose." The accounts were very likely domestic and were "mainly comprised of supporters of the United Conservative Party (UCP)." A seco

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  Vue.js

  Vue.js (commonly referred to as Vue; pronounced "view") is an open-source model–view–viewmodel front end JavaScript framework for building user interfaces and single-page applications. It was created by Evan You and is maintained by him and the rest of the active core team members. == Overview == Vue.js features an incrementally adaptable architecture that focuses on declarative rendering and component composition. The core library is focused on the view layer only. Advanced features required for complex applications such as routing, state management and build tooling are offered via officially maintained supporting libraries and packages. Vue.js allows for extending HTML with HTML attributes called directives. The directives offer functionality to HTML applications, and come as either built-in or user defined directives. == History == Vue was created by Evan You after working for Google using AngularJS in several projects. He later summed up his thought process: "I figured, what if I could just extract the part that I really liked about Angular and build something really lightweight." The first source code commit to the project was dated July 2013, at which time it was originally named "Seed". Vue was first publicly announced the following February, in 2014. Version names are often derived from manga and anime series, with the first letters arranged in alphabetical order. === Versions === When a new major is released i.e. v3.y.z, the last minor i.e. 2.x.y will become a LTS release for 18 months (bug fixes and security patches) and for the following 18 months will be in maintenance mode (security patches only). Vue 3 was officially released in September 2020. According to the State of Vue.js Report 2025, 96% of surveyed developers reported having used Vue 3.x. However, 35% also indicated that they used Vue 2.7.x in the past year, reflecting continued reliance on Vue 2 despite its end of support. The report also noted that more than a quarter of respondents encountered challenges when migrating from Vue 2 to Vue 3. === State management evolution === 2015 - Vuex introduced as official state management solution 2021 - Pinia development begins as Vuex 5 experiment 2022 - Pinia becomes officially recommended for new projects 2023 - Vue team announces Vuex maintenance mode transition According to the State of Vue.js Report 2025, the Vue's core team recommendation is reflected in developer adoption–over 80% of surveyed developers reported using Pinia while Vuex still had 38.4% usage, indicating ongoing reliance on the older library. == Features == === Components === Vue components extend basic HTML elements to encapsulate reusable code. At a high level, components are custom elements to which the Vue's compiler attaches behavior. In Vue, a component is essentially a Vue instance with pre-defined options. The code snippet below contains an example of a Vue component. The component presents a button and prints the number of times the button is clicked: === Templates === Vue uses an HTML-based template syntax that allows binding the rendered DOM to the underlying Vue instance's data. All Vue templates are valid HTML that can be parsed by specification-compliant browsers and HTML parsers. Vue compiles the templates into virtual DOM render functions. A virtual Document Object Model (or "DOM") allows Vue to render components in its memory before updating the browser. Combined with the reactivity system, Vue can calculate the minimal number of components to re-render and apply the minimal amount of DOM manipulations when the app state changes. Vue users can use template syntax or choose to directly write render functions using hyperscript either through function calls or JSX. Render functions allow applications to be built from software components. === Reactivity === Vue features a reactivity system that uses plain JavaScript objects and optimized re-rendering. Each component keeps track of its reactive dependencies during its render, so the system knows precisely when to re-render, and which components to re-render. === Transitions === Vue provides a variety of ways to apply transition effects when items are inserted, updated, or removed from the DOM. This includes tools to: Automatically apply classes for CSS transitions and animations Integrate third-party CSS animation libraries, such as Animate.css Use JavaScript to directly manipulate the DOM during transition hooks Integrate third-party JavaScript animation libraries, such as Velocity.js When an element wrapped in a transition component is inserted or removed, this is what happens: Vue will automatically sniff whether the target element has CSS transitions or animations applied. If it does, CSS transition classes will be added/removed at appropriate timings. If the transition component provided JavaScript hooks, these hooks will be called at appropriate timings. If no CSS transitions/animations are detected and no JavaScript hooks are provided, the DOM operations for insertion and/or removal will be executed immediately on next frame. === Routing === A traditional disadvantage of single-page applications (SPAs) is the inability to share links to the exact "sub" page within a specific web page. Because SPAs serve their users only one URL-based response from the server (it typically serves index.html or index.vue), bookmarking certain screens or sharing links to specific sections is normally difficult if not impossible. To solve this problem, many client-side routers delimit their dynamic URLs with a "hashbang" (#!), e.g. page.com/#!/. However, with HTML5 most modern browsers support routing without hashbangs. Vue provides an interface to change what is displayed on the page based on the current URL path – regardless of how it was changed (whether by emailed link, refresh, or in-page links). Additionally, using a front-end router allows for the intentional transition of the browser path when certain browser events (i.e. clicks) occur on buttons or links. Vue itself doesn't come with front-end hashed routing. But the open-source "vue-router" package provides an API to update the application's URL, supports the back button (navigating history), and email password resets or email verification links with authentication URL parameters. It supports mapping nested routes to nested components and offers fine-grained transition control. With Vue, developers are already composing applications with small building blocks building larger components. With vue-router added to the mix, components must merely be mapped to the routes they belong to, and parent/root routes must indicate where children should render. The code above: Sets a front-end route at websitename.com/user/. Which will render in the User component defined in (const User...) Allows the User component to pass in the particular id of the user which was typed into the URL using the $route object's params key: $route.params.id. This template (varying by the params passed into the router) will be rendered into inside the DOM's div#app. The finally generated HTML for someone typing in: websitename.com/user/1 will be: == Ecosystem == The core library comes with tools and libraries both developed by the core team and contributors. === Official tooling === Devtools – Browser devtools extension for debugging Vue.js applications Vite – Standard Tooling for rapid Vue.js development Vue Loader – a webpack loader that allows the writing of Vue components in a format called Single-File Components (SFCs) Vue.js Plugins Collection - Collection of almost 100 plugins and ecosystem libraries across various categories. === Official libraries === Vue Router – The official router, suitable for building SPAs Pinia – The official state management solution === Video courses === Vue School – Expert-led courses on Vue.js and its ecosystem. === State management libraries === Pinia – Official state management solution with modular architecture Vuex – Legacy state management library, now in maintenance mode VueUse – Collection of 200+ composition utilities including state management helpers === Community & Core Teams Resources === The State of Vue.js Report - A comprehensive publication about Vue.js created since 2017 by Monterail, Vue & Nuxt Official Partner. Each edition includes unique data from developer survey, key ecosystem trends and case studies. The latest 5th edition released in March 2025 was co-created with Evan You and Vue&Nuxt Core Teams. Although the Vue.js Ecosystem is generally very well-developed, developers point to some ecosystem gaps as one of the most important thing missing (as of March 2025 Developer Survey in the State of Vue.js Report 2025). 22% of respondents mentioned the lack of robust, official component libraries like MUI or Radix, and the need for better testing utilities. There was also demand for more modular, enterprise-ready solutions for dashboards, e-commerce, and animation libraries similar to Fr

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  Process map

  Process map is a global-system process model that is used to outline the processes that make up the business system and how they interact with each other. Process map shows the processes as objects, which means it is a static and non-algorithmic view of the processes. It should be differentiated from a detailed process model, which shows a dynamic and algorithmic view of the processes, usually known as a process flow diagram. There are different notation standards that can be used for modelling process maps, but the most notable ones are TOGAF Event Diagram, Eriksson-Penker notation, and ARIS Value Added Chain. == Global process models == Global characteristics of the business system are captured by global or system models. Global process models are presented using different methodologies and sometimes under different names. Most notably, they are named process map in Visual Paradigm and MMABP, value-added chain in ARIS, and process diagram in Eriksson-Penker notation – which can easily lead to the confusion with process flow (detailed process model). Global models are mainly object-oriented and present a static view of the business system; they do not describe dynamic aspects of processes. A process map shows the presence of processes and their mutual relationships. The requirement for the global perspective of the system as a supplementary to the internal process logic description results from the necessity of taking into consideration not only the internal process logic but also its significant surroundings. The algorithmic process model cannot take the place of this perspective since it represents the system model of the process. The detailed process model and the global process model represent different perspectives on the same business system, so these models must be mutually consistent. A macro process map represents the major processes required to deliver a product or service to the customer. These macro process maps can be further detailed in sub-diagrams. It is often the case that process maps cross different functional areas of the organization. Process maps are used by many companies to have a holistic view of all processes and the connections between them. Maps help in navigating the sub-processes and make understanding of the organization's operations easier. The process map shows relationships and dependencies between processes and its focus should be on core business processes of the organization. A process map can be seen as the most abstract level of the process architecture, and it acts as the introduction to the more detailed levels. A process map that is correctly designed is able to provide a general understanding of a company's operations. Designing the process map is an important and strategic step for the organization, and it is followed by further business process modelling implementation. == Context == Methodology for Modelling and Analysis of Business Process (MMABP) is a business process modelling methodology developed at the Department of Information Technology, Faculty of Informatics and Statistics of the Prague University of Economics and Business. The methodology is defined as a “general methodology for modelling business systems using informatics methods and approaches”. Methodology is used to analyse business processes and to develop a comprehensive model of the system. The goal of developing a model is to be used for process optimization. The model should be created following the characteristics and specifics of the organization in question and following external influences that can affect the organization. The model should be optimal from an economic perspective, but it should also be optimal from a factual perspective, meaning that it should be as simple as possible while maintaining complete functionality. Business system modelling is based on a two-dimensional approach: Real World structure (substance) – set of objects and their relationships Real World behaviour – set of mutually connected business processes Additionally, there are also two views of the systems: Global view of the system Detailed view of the system's parts This results in the need to model the system from four different perspectives in order to achieve the complete and comprehensive view of the business system. MMABP also proposes which notation languages can be used for modelling each perspective, and it also suggests some improvements to the notation languages in order to fit the purpose. Global view of the objects – Conceptual model (Class diagram) Detailed view of the objects – Object life cycle (State Chart) Global view of the processes – Process map (Eriksson-Penker Diagram/TOGAF Event Diagram/ARIS VAC) Detailed view of the processes – Model of the process flow (BPMN Diagram) Data Flow Diagram (DFD) is additional diagram used for describing the required functionalities of the information system. == Notation standards == === Eriksson-Penker Diagram === Eriksson-Penker diagram is a tool used in business model analysis and design. It is named after Hans-Erik Eriksson and Magnus Penker, who developed the concept in their book "Business modelling with UML: Business Patterns at Work”. Eriksson-Penker diagrams are used to map out the key components of a business model and how they interact with one another. The diagrams typically consist of a series of boxes and lines that represent the different elements of the business model, such as the value proposition, customer segments, channels, revenue streams, and key resources. The lines between the boxes represent the relationships and dependencies between the different elements of the business model. These diagrams are useful for visualizing and understanding the various components of a business model, and can help organizations identify potential areas for improvement or areas of risk. They can also be used as a communication tool to help stakeholders understand the business model and its underlying assumptions. These diagrams are useful for visualizing and understanding the various components of a business model, and can help organizations identify potential areas for improvement or areas of risk. They can also be used as a communication tool to help stakeholders understand the business model and its underlying assumptions. It is possible to use Eriksson-Penker diagrams to create a global process view of a business. In this case, a diagram would be used to map out the key processes and activities that are involved in the business, as well as the relationships and dependencies between these processes. For example, an Eriksson-Penker diagram could be used to depict the various steps involved in the product development process, from concept development to market launch. It could also be used to show how different functions within the organization, such as marketing, sales, and production, interact and depend on one another to support the overall business. Eriksson-Penker diagram is one of the most popular de facto standards that can be used for an object-oriented global view of business processes. It is developed as an extension of the UML, and it is often used together with the BPMN to compensate for the lack of possibility to model the global view with this widely accepted standard. === TOGAF Event Diagram === TOGAF (The Open Group Architecture Framework) is a framework for enterprise architecture that provides a common language and set of standards for designing, planning, implementing, and governing an enterprise's IT architecture. TOGAF event diagrams are diagrams used in the TOGAF framework to represent the flow of events within a system or process. The TOGAF Event Diagram is a visual representation of the events within an organization or system. It can be used to show the sequence of events that occur in a particular process, as well as the relationships between the events and the stakeholders involved. TOGAF Event Diagrams can be useful in creating a global process view because they provide a visual representation of the events, which can be helpful in understanding how the process fits into the larger context of the organization. TOGAF Event Diagram is the most perspective standard for the system view of processes today. It is used to represent the system of processes as well as their connections to the functional organizational structure. === ARIS Value Added Chain === ARIS (Architecture of Integrated Information Systems) is a methodology and a set of tools for designing and managing business processes. It is based on the idea that business processes are the core of an organization and that they can be modelled and optimized to improve efficiency and effectiveness. The ARIS methodology provides a framework for understanding and analysing business processes, as well as for designing and implementing improvements to those processes. It includes a set of graphical modelling languages and tools for creating process models, as well as a database for storing and managing pr

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  International Teletraffic Congress

  The International Teletraffic Congress (ITC) is the first international conference in networking science and practice. It was created in 1955 by Arne Jensen to initially cater to the emerging need to understand and model traffic in telephone networks using stochastic methodologies, and to bring together researchers with these considerations as a common theme. Up through World War II, teletraffic research was done mainly by engineers and mathematicians working in telephone companies. Most of their work was published in local or company journals. In 1955, however, the field acquired a formal, international, institutional structure, with the organization of the first International Teletraffic Congress (ITC). Over the years, it has broaden its scope to address a wide spectrum ranging from the mathematical theory of traffic processes, stochastic system modelling and analysis, traffic and performance measurements, network management, traffic engineering to network capacity planning and cost optimization, including network economics and reliability for various types of networks. ITC served as a forum for all theoretical fundamentals and engineering practices for large-scale deployment and operation of telecommunications networks. Since its inception, ITC witnessed the evolution of communications and networking: the influence of computer science on telecommunication, the advent of the Internet and the massive deployment of mobile communications and optics, the appearance of peer-to-peer networking and social networks, the ever increasing speed and flexibility of new communication technologies, networks, user devices, and applications, and the ever changing operation challenges arising from this development. ITC documented this evolution with contemporary measurement studies, performance analyses of new technologies, recommendations for provisioning and configuration, and greatly contributed to the methodological toolbox of network scientists. Today, with its conferences, specialist seminars, regional seminars, training courses and publications, the ITC aims at a worldwide forum for all questions related to network and service performance, management, and assessment, both present and futuristic. The notion of traffic is broadly used to encompass data traffic from the MAC layer all the way to application traffic in the application layer. The scope of ITC is thus ranging all issues embedding operations, design, planning, economics and performance analysis of current and emerging communication networks and services, to be addressed by applying a variety of tools from different fields, such as Stochastic Processes, Information theory, Control theory, Signal and Processing, Game theory and optimization techniques, Statistical methodologies and Artificial Intelligence techniques. The target audience of such issues is experts from research organizations, universities, equipment vendors and suppliers, network operators, service providers, system integrators and international technical organizations, guaranteeing a well-balanced contribution from theory, application, and practice. The general goal remains to bring researchers and practitioners together toward operational understanding of all types of current and future networks. The ITC is ruled by the International Advisory Council (IAC) which gathers a number of technical experts, from universities and the research arms of key corporations in the industry, from countries having a strong tradition in teletraffic development. The IAC responsibilities are to disseminate information on teletraffic which is of interest for the whole community and: to select the locations of Plenary Congresses and to ensure their high-level technical programme to support Specialist Seminars on specific topics of current interest to promote Regional Seminars for the dissemination of teletraffic concepts in developing countries to facilitate the liaison activity with the ITU through participation in the standardization process and in the Development Programme The technical program and the organization of each ITC event remains within the responsibilities of the hosting country, but with significant IAC support to guarantee that the event is consistent with the quality standards established during the previous congresses. The ITC Plenary Congresses were scheduled tri-annually from 1955 until 1995 when the interval became bi-annual to account for the ever-accelerating development of network technologies, products and services and the associated dramatic increases in network demands. Similarly, to better cover the impact of dramatic changes undergoing in the field of computer and communication systems, networks and usage, it has been decided to hold the Plenary Congress on an annual basis from 2009. == Content == Teletraffic science is the traditional term for all theoretical fundamentals and engineering practices to describe data flows in telecommunication networks, the performance of the usage of network resources, procedures for sizing of resources and engineering the networks for given traffic load and quality of service requirements. For more than 50 years of the 20th century, traffic or teletraffic has been identified primarily with telephone networks. With the huge development of computers, stored program control of network nodes and computer communication, the traditional teletraffic science field naturally extended to computer networks, mobile and wireless/optical networks, and for a wide spectrum of new applications. The convergence between the voice network, the Internet, the television and mobility raised new questions that request new models and tools to be developed. In addition, the development of community networks, home networking, multiple access networking technologies, and the advent of pervasive and ambient communications dictates new challenges to be addressed. Today, ITC addresses the emerging paradigms such as an increasing diversity of distributed applications and services over various media like mobile/optical networks, enabling new markets and economy. ITC has steered the evolutions in communications since its creation in 1955 and remains at the forefront of innovation regarding modeling and performance. The scientific roots of communications traffic are based on the theory of probability and stochastic processes, modelling and performance evaluation. Modelling is the key for the mathematical description and quantitative performance analysis. Traffic flows are described by stochastic processes with complex dependencies which have to be validated by traffic measurements. Modelling also includes operational properties of resource control reflected by service strategies such as queueing disciplines, admission control, and routing. The results of such performance analyses are used for resource dimensioning (sizing), resource management, and network optimization while providing targeted Quality of Service. Teletraffic science is closely related to methods of operation research (queueing theory, optimization, forecasting) and computational sciences (simulation technology distributed systems). In this context, ITC represents a wide community of researchers and practitioners and is regularly organizing events like Congresses, Specialist Seminars and Workshops in order to discuss the latest changes in the modelling, design and performance of communication systems, networks and services. === The evolution of technologies of the 20th century === ITC has been witnessing the change of communication and networking technologies which are reflected in the proceedings and programs of the congresses. The specialist seminars and the motto of the congresses thereby reflect the hot topics of that time and the evolution. Selected topics of the 70's, 80's and 90's were 1998: Traffic Issues related to Multimedia and Nomadic Communications 1995: Traffic Modeling and Measurement in Broadband and Mobile Communications 1990: Broadband Technologies: Architectures, Applications, Control and Performance 1986: ISDN Traffic Issues 1984: Fundamentals of Teletraffic Theory 1977: Modeling of SPC Exchanges and Data Networks === Recent topics in the 21st century === With the rise of the Internet, new networking paradigms and technologies but also new challenges emerged: 2020: Teletraffic in the era of beyond-5G and AI 2019: Networked Systems and Services 2018: Teletraffic in the Smart World 2017: Ubiquitous, software-based, and sustainable networks and services 2016: Digital Connected World 2015: Traffic, Performance and Big Data 2014: Towards a Sustainable World 2013: Energy Efficient and Green Networking 2010: Multimedia Applications - Traffic, Performance and QoE 2009: Network Virtualization - Concepts and Performance 2008: Future Internet Design and Experimental Facilities 2008: Quality of Experience 2002: Internet Traffic Engineering and Traffic Management == Arne Jensen Lifetime Achievement Awards == The Arne Jensen Lifetime A

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  Enterprise bookmarking

  Enterprise bookmarking is a method for Web 2.0 users to tag, organize, store, and search bookmarks of both web pages on the Internet and data resources stored in a distributed database or fileserver. This is done collectively and collaboratively in a process by which users add tag (metadata) and knowledge tags. In early versions of the software, these tags are applied as non-hierarchical keywords, or terms assigned by a user to a web page, and are collected in tag clouds. Examples of this software are Connectbeam and Dogear. New versions of the software such as Jumper 2.0 and Knowledge Plaza expand tag metadata in the form of knowledge tags that provide additional information about the data and are applied to structured and semi-structured data and are collected in tag profiles. == History == Enterprise bookmarking is derived from Social bookmarking that got its modern start with the launch of the website del.icio.us in 2003. The first major announcement of an enterprise bookmarking platform was the IBM Dogear project, developed in Summer 2006. Version 1.0 of the Dogear software was announced at Lotusphere 2007, and shipped later that year on June 27 as part of IBM Lotus Connections. The second significant commercial release was Cogenz in September 2007. Since these early releases, Enterprise bookmarking platforms have diverged considerably. The most significant new release was the Jumper 2.0 platform, with expanded and customizable knowledge tagging fields. == Differences == === Versus social bookmarking === In a social bookmarking system, individuals create personal collections of bookmarks and share their bookmarks with others. These centrally stored collections of Internet resources can be accessed by other users to find useful resources. Often these lists are publicly accessible, so that other people with similar interests can view the links by category or by the tags themselves. Most social bookmarking sites allow users to search for bookmarks which are associated with given "tags", and rank the resources by the number of users which have bookmarked them. Enterprise bookmarking is a method of tagging and linking any information using an expanded set of tags to capture knowledge about data. It collects and indexes these tags in a web-infrastructure knowledge base server residing behind the firewall. Users can share knowledge tags with specified people or groups, shared only inside specific networks, typically within an organization. Enterprise bookmarking is a knowledge management discipline that embraces Enterprise 2.0 methodologies to capture specific knowledge and information that organizations consider proprietary and are not shared on the public Internet. === Tag management === Enterprise bookmarking tools also differ from social bookmarking tools in the way that they often face an existing taxonomy. Some of these tools have evolved to provide Tag management which is the combination of uphill abilities (e.g. faceted classification, predefined tags, etc.) and downhill gardening abilities (e.g. tag renaming, moving, merging) to better manage the bottom-up folksonomy generated from user tagging.

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  Web science

  Web science is an emerging interdisciplinary field concerned with the study of large-scale socio-technical systems, particularly the World Wide Web. It considers the relationship between people and technology, the ways that society and technology co-constitute one another and the impact of this co-constitution on broader society. Web Science combines research from disciplines as diverse as sociology, computer science, economics, and mathematics. The Web Science Institute, founded at the University of Southampton by director Wendy Hall and colleagues, describes Web Science as focusing "the analytical power of researchers from disciplines as diverse as mathematics, sociology, economics, psychology, law and computer science to understand and explain the Web. It is necessarily interdisciplinary – as much about social and organizational behaviour as about the underpinning technology." A central pillar of Web science development is Artificial Intelligence or "AI". The current artificial intelligence that in development at the moment is Human-Centered, with goals to further professional development courses as well as influencing public policy. Artificial intelligence developers are focused on the most impactful uses of this technology, while also hoping to expedite the growth and development of the human race. An early definition was given by American computer scientist Ben Shneiderman: "Web Science" is processing the information available on the web in similar terms to those applied to natural environment. == Areas of activity == === Emergent properties === Philip Tetlow, an IBM-based scientist influential in the emergence of web science as an independent discipline, argued for the concept of web life, which considers the Web not as a connected network of computers, as in common interpretations of the Internet, but rather as a sociotechnical machine capable of fusing together individuals and organisations into larger coordinated groups. It argues that unlike the technologies that have come before it, the Web is different in that its phenomenal growth and complexity are starting to outstrip our capability to control it directly, making it impossible for us to grasp its completeness in one go. Tetlow made use of Fritjof Capra's concept of the 'web of life' as a metaphor. == Research groups == There are numerous academic research groups engaged in Web Science research, many of which are members of WSTNet, the Web Science Trust Network of research labs. Health Web Science emerged as a sub-discipline of Web Science that studies the role of the Web's impact on human's health outcomes and how to further utilize the Web to improve health outcomes. These groups focus on the developmental possibilities, provided through Web Science, in areas such as health care and social welfare. Discussion of web science has been widely adopted as a method in which the internet can have a real world impact in the field of medicine, currently coined Medicine 2.0. The World Wide Web acts as a medium for the spread and circulation of knowledge, though these various research groups consider themselves responsible for maintaining verifiable and testable knowledge. Using their knowledge of the healthcare system as well as web science, researchers are focused on formatting and structuring their knowledge in a way that is easily accessible throughout the internet. The World Wide Web is quickly evolving meaning that the information we provide and its formatting must also. Recognizing the overlap between both aspects, the spread of knowledge and development of the internet, allows us to properly display our knowledge in a manner that evolves as quickly as the internet and everyday medical research. The accessibility of the internet and quick development of knowledge must be companied with efficient formatting to allocate successful dissemination of information, as described by these various researcher groups. == Related major conferences == Association for Computing Machinery (ACM), Hypertext Conference (HT) sponsored by SIGWEB ACM SIGCHI Conference on Human Factors in Computing Systems (CHI) International AAAI Conference on Weblogs and Social Media (ICWSM) The Web Conference (WWW) Association for Computing Machinery (ACM) Web Science Conference (WebSci)

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  Pyramid (image processing)

  Pyramid, or pyramid representation, is a type of multi-scale signal representation developed by the computer vision, image processing and signal processing communities, in which a signal or an image is subject to repeated smoothing and subsampling. Pyramid representation is a predecessor to scale-space representation and multiresolution analysis. == Pyramid generation == There are two main types of pyramids: lowpass and bandpass. A lowpass pyramid is made by smoothing the image with an appropriate smoothing filter and then subsampling the smoothed image, usually by a factor of 2 along each coordinate direction. The resulting image is then subjected to the same procedure, and the cycle is repeated multiple times. Each cycle of this process results in a smaller image with increased smoothing, but with decreased spatial sampling density (that is, decreased image resolution). If illustrated graphically, the entire multi-scale representation will look like a pyramid, with the original image on the bottom and each cycle's resulting smaller image stacked one atop the other. A bandpass pyramid is made by forming the difference between images at adjacent levels in the pyramid and performing image interpolation between adjacent levels of resolution, to enable computation of pixelwise differences. == Pyramid generation kernels == A variety of different smoothing kernels have been proposed for generating pyramids. Among the suggestions that have been given, the binomial kernels arising from the binomial coefficients stand out as a particularly useful and theoretically well-founded class. Thus, given a two-dimensional image, we may apply the (normalized) binomial filter (1/4, 1/2, 1/4) typically twice or more along each spatial dimension and then subsample the image by a factor of two. This operation may then proceed as many times as desired, leading to a compact and efficient multi-scale representation. If motivated by specific requirements, intermediate scale levels may also be generated where the subsampling stage is sometimes left out, leading to an oversampled or hybrid pyramid. With the increasing computational efficiency of CPUs available today, it is in some situations also feasible to use wider supported Gaussian filters as smoothing kernels in the pyramid generation steps. === Gaussian pyramid === In a Gaussian pyramid, subsequent images are weighted down using a Gaussian average (Gaussian blur) and scaled down. Each pixel containing a local average corresponds to a neighborhood pixel on a lower level of the pyramid. This technique is used especially in texture synthesis. === Laplacian pyramid === A Laplacian pyramid is very similar to a Gaussian pyramid but saves the difference image of the blurred versions between each levels. Only the smallest level is not a difference image to enable reconstruction of the high resolution image using the difference images on higher levels. This technique can be used in image compression. === Steerable pyramid === A steerable pyramid, developed by Simoncelli and others, is an implementation of a multi-scale, multi-orientation band-pass filter bank used for applications including image compression, texture synthesis, and object recognition. It can be thought of as an orientation selective version of a Laplacian pyramid, in which a bank of steerable filters are used at each level of the pyramid instead of a single Laplacian or Gaussian filter. == Applications of pyramids == === Alternative representation === In the early days of computer vision, pyramids were used as the main type of multi-scale representation for computing multi-scale image features from real-world image data. More recent techniques include scale-space representation, which has been popular among some researchers due to its theoretical foundation, the ability to decouple the subsampling stage from the multi-scale representation, the more powerful tools for theoretical analysis as well as the ability to compute a representation at any desired scale, thus avoiding the algorithmic problems of relating image representations at different resolution. Nevertheless, pyramids are still frequently used for expressing computationally efficient approximations to scale-space representation. === Detail manipulation === Levels of a Laplacian pyramid can be added to or removed from the original image to amplify or reduce detail at different scales. However, detail manipulation of this form is known to produce halo artifacts in many cases, leading to the development of alternatives such as the bilateral filter. Some image compression file formats use the Adam7 algorithm or some other interlacing technique. These can be seen as a kind of image pyramid. Because those file format store the "large-scale" features first, and fine-grain details later in the file, a particular viewer displaying a small "thumbnail" or on a small screen can quickly download just enough of the image to display it in the available pixels—so one file can support many viewer resolutions, rather than having to store or generate a different file for each resolution.

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  Randomized benchmarking

  Randomized benchmarking is an experimental method for measuring the average error rates of quantum computing hardware platforms. The protocol estimates the average error rates by implementing long sequences of randomly sampled quantum gate operations. Randomized benchmarking is the industry-standard protocol used by quantum hardware developers such as IBM and Google to test the performance of the quantum operations. The original theory of randomized benchmarking, proposed by Joseph Emerson and collaborators, considered the implementation of sequences of Haar-random operations, but this had several practical limitations. The now-standard protocol for randomized benchmarking (RB) relies on uniformly random Clifford operations, as proposed in 2006 by Dankert et al. as an application of the theory of unitary t-designs. In current usage randomized benchmarking sometimes refers to the broader family of generalizations of the 2005 protocol involving different random gate sets that can identify various features of the strength and type of errors affecting the elementary quantum gate operations. Randomized benchmarking protocols are an important means of verifying and validating quantum operations and are also routinely used for the optimization of quantum control procedures. == Overview == Randomized benchmarking offers several key advantages over alternative approaches to error characterization. For example, the number of experimental procedures required for full characterization of errors (called tomography) grows exponentially with the number of quantum bits (called qubits). This makes tomographic methods impractical for even small systems of just 3 or 4 qubits. In contrast, randomized benchmarking protocols are the only known approaches to error characterization that scale efficiently as number of qubits in the system increases. Thus RB can be applied in practice to characterize errors in arbitrarily large quantum processors. Additionally, in experimental quantum computing, procedures for state preparation and measurement (SPAM) are also error-prone, and thus quantum process tomography is unable to distinguish errors associated with gate operations from errors associated with SPAM. In contrast, RB protocols are robust to state-preparation and measurement errors Randomized benchmarking protocols estimate key features of the errors that affect a set of quantum operations by examining how the observed fidelity of the final quantum state decreases as the length of the random sequence increases. If the set of operations satisfies certain mathematical properties, such as comprising a sequence of twirls with unitary two-designs, then the measured decay can be shown to be an invariant exponential with a rate fixed uniquely by features of the error model. == History == Randomized benchmarking was proposed in Scalable noise estimation with random unitary operators, where it was shown that long sequences of quantum gates sampled uniformly at random from the Haar measure on the group SU(d) would lead to an exponential decay at a rate that was uniquely fixed by the error model. Emerson, Alicki and Zyczkowski also showed, under the assumption of gate-independent errors, that the measured decay rate is directly related to an important figure of merit, the average gate fidelity and independent of the choice of initial state and any errors in the initial state, as well as the specific random sequences of quantum gates. This protocol applied for arbitrary dimension d and an arbitrary number n of qubits, where d=2n. The SU(d) RB protocol had two important limitations that were overcome in a modified protocol proposed by Dankert et al., who proposed sampling the gate operations uniformly at random from any unitary two-design, such as the Clifford group. They proved that this would produce the same exponential decay rate as the random SU(d) version of the protocol proposed in Emerson et al.. This follows from the observation that a random sequence of gates is equivalent to an independent sequence of twirls under that group, as conjectured in and later proven in. This Clifford-group approach to Randomized Benchmarking is the now standard method for assessing error rates in quantum computers. A variation of this protocol was proposed by NIST in 2008 for the first experimental implementation of an RB-type for single qubit gates. However, the sampling of random gates in the NIST protocol was later proven not to reproduce any unitary two-design. The NIST RB protocol was later shown to also produce an exponential fidelity decay, albeit with a rate that depends on non-invariant features of the error model In recent years a rigorous theoretical framework has been developed for Clifford-group RB protocols to show that they work reliably under very broad experimental conditions. In 2011 and 2012, Magesan et al. proved that the exponential decay rate is fully robust to arbitrary state preparation and measurement errors (SPAM). They also proved a connection between the average gate fidelity and diamond norm metric of error that is relevant to the fault-tolerant threshold. They also provided evidence that the observed decay was exponential and related to the average gate fidelity even if the error model varied across the gate operations, so-called gate-dependent errors, which is the experimentally realistic situation. In 2018, Wallman and Dugas et al., showed that, despite concerns raised in, even under very strong gate-dependence errors the standard RB protocols produces an exponential decay at a rate that precisely measures the average gate-fidelity of the experimentally relevant errors. The results of Wallman. in particular proved that the RB error rate is so robust to gate-dependent errors models that it provides an extremely sensitive tool for detecting non-Markovian errors. This follows because under a standard RB experiment only non-Markovian errors (including time-dependent Markovian errors) can produce a statistically significant deviation from an exponential decay The standard RB protocol was first implemented for single qubit gate operations in 2012 at Yale on a superconducting qubit. A variation of this standard protocol that is only defined for single qubit operations was implemented by NIST in 2008 on a trapped ion. The first implementation of the standard RB protocol for two-qubit gates was performed in 2012 at NIST for a system of two trapped ions

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  MicroTCA

  MicroTCA (short for Micro Telecommunications Computing Architecture, also: μTCA) is a modular, open standard, created and maintained by the PCI Industrial Computer Manufacturers Group (PICMG). It provides the electrical, mechanical, thermal and management specifications to create a switched fabric computer system, using Advanced Mezzanine Cards (AMC), connected directly to a backplane. MicroTCA is a descendant of the AdvancedTCA standard. == History == The rapid expansion of mobile telecommunications and their associated services (such as text messages) at the beginning of the millennium increased the demand of processing power in telecommunication systems. The existing "carrier grade" (see RAS) computing architectures were not fit to house the high performance processors of the time. In order to answer those demands, about 100 companies worked together in PICMG, resulting in the Advanced Telecommunications Architecture (AdvancedTCA, ATCA), published in 2002. After the introduction of AdvancedTCA, a standard was developed, to cater towards smaller telecommunications systems at the edge of the network. This standard was geared towards a more compact, less expensive systems, without cutting back on reliability or data throughput. This standard, called MicroTCA, was ratified 2006. MicroTCA systems migrated after its release into non-telecommunication sectors, like defence, avionics and science. This resulted in extensions to the base-standard, called modules. == Modules == === MicroTCA.0 === The base-specification for properties common to all other modules, ratified July 6, 2006. This includes: Mechanical specifications, like possible dimensions of card cages, backplanes and supported AMC-modules Electrical specifications, like power distribution and interface layout Thermal specifications, like possible cooling layouts or available cooling power Management specifications A second revision of the base-specifications was ratified January 16, 2020, containing some corrections, as well as alterations, necessary to implement higher speed Ethernet fabrics, like 10GBASE-KR and 40GBASE-KR4. === MicroTCA.1 === This module adds specifications for ruggedized systems, using forced air for cooling. Possible scenarios for MicroTCA.1-based systems include outside plant telecom, industrial and aerospace environments === MicroTCA.2 === This module adds specifications for more stringent requirements with regards to temperature, shock, vibration and other environmental conditions. These specifications are geared towards use in outside plant telecom, machine and transport industry, as well as military airborne, shipboard and ground mobile equipment. MicroTCA.2 allows the use of air- and conduction-cooled AMC-modules. === MicroTCA.3 === This module adds specifications for even more stringent requirements with regards to temperature, shock, vibration and other environmental conditions. These specifications are geared towards use in outside plant telecom, machine and transport industry, as well as military airborne, shipboard and ground mobile equipment. MicroTCA.3 requires the use of conduction-cooled AMC-modules. === MicroTCA.4 === This module extends the AMC with a Rear Transition Module (RTM), increasing PCB-space and modularity. AMC and RTM are connected with a connector, located in zone 3, defined in MicroTCA.0. These specifications are geared towards use in large-scale scientific devices, like particle accelerators or telescopes. == Components of MicroTCA == === Card Cage === The card cage (also: shelf, crate) houses all the other components and as such has two primary functions: Provide mechanical stability to the other components Ensure sufficient cooling There exist a wide array of card cages. They usually differ in: the type of modules they support (MTCA.0, MTCA.1, ...) the number of slots they provide (typically between 2 and 12) the architecture of the installed backplane (see below) the cooling scheme they use (i.e. airflow front-to-back, bottom-to-top, side-to-side, conductive,...) === Backplane === The backplane is a printed circuit board, mounted directly into the card cage. It connects all other components of a MicroTCA system to each other and provides power, data access and management access to them. Two types of power are distributed over the backplane, Management Power (+3.3 V) and Payload Power (+12 V). Unlike typical backplanes, where power is distributed to all components via a common "powerplane" in the PCB, on a MicroTCA backplane, Management and Payload Power are distributed to each component individually. While Management Power is provided to each module connected to a powered backplane, Payload Power has to be granted by the MicroTCA Carrier Hub (MCH), after ensuring that the module is MicroTCA-compatible. The standard defines various communication buses, which the backplane can/should provide: Gigabit Ethernet IPMI SATA Fat pipe (can be used for PCIe, SRIO or 10G/40G Ethernet) Point to Point Links Clocks JTAG === Cooling Unit === The Cooling Unit (CU) provides controlled air flow in air-flow-cooled card cages. It usually consists of an array of fans and a controller, which is connected to the backplane. The MicroTCA Carrier Hub (MCH) can read-out temperature sensors (if present) and fan speed, as well as change fan speed via IPMI. The Cooling Unit is usually fitted to a specific card cage. Some CUs are easily detachable (i.e. for cleaning or replacement), while other card cages come with integrated, non-detachable CUs. === Power Module === The Power Module (PM, also: Power Supply) converts the AC power from the power line to the +3.3 V Management Power (MP) and +12 V Payload Power (PP), both of which are DC. There exist a variety of power modules, which differ in: form factor (i.e. double width, single width) input voltage (110 V, 220 V, both) output power (i.e. 600 W, 1000 W) The power module senses the presence of a module in a slot via a specified pin in the module connector, and immediately provides that module with management power. Payload power is managed by the MicroTCA Carrier Hub (MCH), which communicates with the power module via IPMI. The power module uses its own type of connector, and can thus only be installed into designated slots, which in turn can't carry any other type of module. Some card cages provide an additional power module slot for redundancy. In such a case, one slot is the primary, which will provide power by default, and the other one is secondary, providing power only, if the primary does not. === MicroTCA Carrier Hub === The MicroTCA Carrier Hub (MCH) is the central managing device of a MicroTCA card cage. It manages power distribution and cooling. It usually also provides Gigabit Ethernet and/or PCIe/Serial RapidIO switching. Some MCHs additionally provide clocking. As the name indicates, they are the hub of various star topologies (i.e. for Ethernet, PCIe) on the backplane and thus require dedicated slot(s). Some backplanes support two MCHs for redundancy. In this case there are two MCH slots, with one being designated primary, and one secondary. === Advanced Mezzanine Card === Advanced Mezzanine Card (AMC) is a standard for hot-pluggable PCBs. It was originally developed to be used in AdvancedTCA systems. The standard specifies: the dimensions of the PCB with two width variants (single, double) and three height variants (Compact, Mid-size, Full) type, location and orientation of connectors (i.e. Zone 1, 2, 3) There is a huge variation of functionalities, an AMC can fulfill: Computing (i.e. a module with CPU, RAM, SSD and on-board graphics) Storage (i.e. SSD carrier) Graphics card FPGA card (i.e. for signal processing) FMC carrier Digitizer card (Analog-Digital and Digital-Analog Conversion) Clocking and Triggering and others === Rear Transition Module (MTCA.4 only) === The Rear Transition Module (RTM) was added in the MicroTCA.4 standard. It is connected directly to an AMC via a connector, located in zone 3, requiring a double width AMC and RTM. An RTM has about the same dimensions, as an AMC, basically doubling the available PCB-space per slot in an MTCA.4 card cage. Its power is provided by the AMC. Thus an RTM can not operate on its own, but requires a paired AMC. The zone 3 connector is electrically free configurable, making it possible, that a mechanically fitting AMC-RTM pair is electrically incompatible. To avoid damage due to that incompatibility, a mechanical code-pin was added to MTCA.4-compatible AMCs and RTMs, mechanically preventing the installation of an electrically incompatible RTM to an AMC. The functionality of RTMs includes, but is not limited to: RF-signal pre-/post-processing (i.e. filtering, Up-/Down-conversion, Vector De-/Modulation) Digital signal pre-/post-processing Clock-generation/-distribution Device interfaces Date storage CPU (only MCH-RTM)

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  GPU switching

  GPU switching is a mechanism used on computers with multiple graphic controllers. This mechanism allows the user to either maximize the graphic performance or prolong battery life by switching between the graphic cards. It is mostly used on gaming laptops which usually have an integrated graphic device and a discrete video card. == Basic components == Most computers using this feature contain integrated graphics processors and dedicated graphics cards that applies to the following categories. === Integrated graphics === Also known as: Integrated graphics, shared graphics solutions, integrated graphics processors (IGP) or unified memory architecture (UMA). This kind of graphics processors usually have much fewer processing units and share the same memory with the CPU. Sometimes the graphics processors are integrated onto a motherboard. It is commonly known as: on-board graphics. A motherboard with on-board graphics processors doesn't require a discrete graphics card or a CPU with graphics processors to operate. === Dedicated graphics cards === Also known as: discrete graphics cards. Unlike integrated graphics, dedicated graphics cards have much more processing units and have its own RAM with much higher memory bandwidth. In some cases, a dedicated graphics chip can be integrated onto the motherboards, B150-GP104 for example. Regardless of the fact that the graphics chip is integrated, it is still counted as a dedicated graphics cards system because the graphics chip is integrated with its own memory. == Theory == Most Personal Computers have a motherboard that uses a Southbridge and Northbridge structure. === Northbridge control === The Northbridge is one of the core logic chipset that handles communications between the CPU, GPU, RAM and the Southbridge. The discrete graphics card is usually installed onto the graphics card slot such as PCI-Express and the integrated graphics is integrated onto the CPU itself or occasionally onto the Northbridge. The Northbridge is the most responsible for switching between GPUs. The way how it works usually has the following process (refer to the Figure 1. on the right): The Northbridge receives input from Southbridge through the internal bus. The Northbridge signals to CPU through the Front-side bus. The CPU runs the task assignment application (usually the graphics card driver) to determine which GPU core to use. The CPU passes down the command to the Northbridge. The Northbridge passes down the command to the according GPU core. The GPU core processes the command and returns the rendered data back to the Northbridge. The Northbridge sends the rendered data back to Southbridge. === Southbridge control === The Southbridge is a set of integrated circuits such Intel's I/O Controller Hub (ICH). It handles all of a computer's I/O functions, such as receiving the keyboard input and outputting the data onto the screen. The way how it usually works usually has two steps: Take in the user input and pass it down to the Northbridge. (Optional) Receive the rendered data from the Northbridge and output it. The reason why the second step can be optional is that sometimes the rendered the data is outputted directly from the discrete graphics card which is located on the graphics card slot so there is no need to output the data through the Southbridge. == Main purpose == GPU switching is mostly used for saving energy by switching between graphic cards. The dedicated graphics cards consume much more power than integrated graphics but also provides higher 3D performances, which is needed for a better gaming and CAD experience. Following is a list of the TDPs of the most popular CPU with integrated graphics and dedicated graphics cards. The dedicated graphics cards exhibit much higher power consumption than the integrated graphics on both platforms. Disabling them when no heavy graphics processing is needed can significantly lower the power consumption. == Technologies == === Nvidia Optimus === Nvidia Optimus™ is a computer GPU switching technology created by Nvidia that can dynamically and seamlessly switch between two graphic cards based on running programs. === AMD Enduro === AMD Enduro™ is a collective brand developed by AMD that features many new technologies that can significantly save power. It was previously named as: PowerXpress and Dynamic Switchable Graphics (DSG). This technology implements a sophisticated system to predict the potential usage need for graphics cards and switch between graphics cards based on predicted need. This technology also introduces a new power control plan that allows the discrete graphics cards consume no energy when idling. == Manufacturers == === Integrated graphics === In personal computers, the IGP (integrated graphics processors) are mostly manufactured by Intel and AMD and are integrated onto their CPUs. They are commonly known as: Intel HD and Iris Graphics - also called HD series and Iris series AMD Accelerated Processing Unit (APU) - also formerly known as: fusion === Dedicated graphics cards === The most popular dedicated graphics cards are manufactured by AMD and Nvidia. They are commonly known as: AMD Radeon Nvidia GeForce == Drivers and OS support == Most common operating systems have built-in support for this feature. However, the users may download the updated drivers from Nvidia or AMD for better experience. === Windows support === Windows 7 has built-in support for this feature. The system automatically switches between GPUs depending on the program that's running. However, the user may switch the GPUs manually through device manager or power manager. === Linux === Modern Linux systems handle hybrid graphics in two parts: power/control for the inactive GPU, and optional render offloading for individual applications. vga_switcheroo (in the kernel since 2.6.34) coordinates power and mux control on systems with multiple GPUs. It was designed primarily for muxed designs (hardware display switch), and on muxless laptops it is typically used only for power control. A display server restart is no longer required for offloading on muxless systems. DRI PRIME (Mesa) enables per-process render offload on muxless systems: an app renders on the discrete GPU and the integrated GPU presents the result. Users can opt in via the DRI_PRIME environment variable (e.g., DRI_PRIME=1) or desktop integration. On GNOME, the switcheroo-control service exposes the discrete GPU to the shell, adding a “Launch using Discrete Graphics Card” entry to app menus on supported systems (Wayland or Xorg), which invokes render offload under the hood. With the proprietary Nvidia driver, render offload is provided as PRIME Render Offload (supported since driver 435.xx). Distributions commonly ship a helper like prime-run or desktop menu entries that set the required environment for offloading. ==== Notes and limitations (Linux) ==== On muxless systems the internal display is hard-wired to the integrated GPU; the discrete GPU cannot directly drive that panel and instead renders offscreen for composition by the iGPU. External displays connected to the dGPU may allow direct output depending on the laptop’s wiring. Power-saving behavior varies by driver and distro defaults. Some setups need explicit configuration to power down the inactive GPU when idle. Desktop integrations (e.g., GNOME's menu item) simply opt an app into offload; they do not "auto-switch" the whole session. Users can still launch apps on either GPU as needed.

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  Terminology model

  A terminology model is a refinement of a concept system. Within a terminology model the concepts (object types) of a specific problem or subject area are defined by subject-matter experts in terms of concept (object type) definitions and definitions of subordinated concepts or characteristics (properties). Besides object types, the terminology model allows defining hierarchical classifications, definitions for object type and property behavior and definition of casual relations. The terminology model is a means for subject-matter experts to express their knowledge about the subject in subject-specific terms. Since the terminology model is structured rather similar to an object-oriented database schema, is can be transformed without loss of information into an object-oriented database schema. Thus, the terminology model is a method for problem analysis on the one side and a mean of defining database schema on the other side. Several terminology models have been developed and published in the field of statistics: Terminology model for classifications Terminology model for statistical variables Reference model for statistical metadata

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  Nitro Zeus

  Nitro Zeus is the project name for a well funded comprehensive cyber attack plan created as a mitigation strategy after the Stuxnet malware campaign and its aftermath. Unlike Stuxnet, that was loaded onto a system after the design phase to affect its proper operation, Nitro Zeus's objectives are built into a system during the design phase unbeknownst to the system users. This built-in feature allows a more assured and effective cyber attack against the system's users. The information about its existence was raised during research and interviews carried out by Alex Gibney for his Zero Days documentary film. The proposed long term widespread infiltration of major Iranian systems would disrupt and degrade communications, power grid, and other vital systems as desired by the cyber attackers. This was to be achieved by electronic implants in Iranian computer networks. The project was seen as one pathway in alternatives to full-scale war.

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  Hardware-based encryption

  Hardware-based encryption is the use of computer hardware to assist software, or sometimes replace software, in the process of data encryption. Typically, this is implemented as part of the processor's instruction set. For example, the AES encryption algorithm (a modern cipher) can be implemented using the AES instruction set on the ubiquitous x86 architecture. Such instructions also exist on the ARM architecture. However, more unusual systems exist where the cryptography module is separate from the central processor, instead being implemented as a coprocessor, in particular a secure cryptoprocessor or cryptographic accelerator, of which an example is the IBM 4758, or its successor, the IBM 4764. Hardware implementations can be faster and less prone to exploitation than traditional software implementations, and furthermore can be protected against tampering. == History == Prior to the use of computer hardware, cryptography could be performed through various mechanical or electro-mechanical means. An early example is the Scytale used by the Spartans. The Enigma machine was an electro-mechanical system cipher machine notably used by the Germans in World War II. After World War II, purely electronic systems were developed. In 1987 the ABYSS (A Basic Yorktown Security System) project was initiated. The aim of this project was to protect against software piracy. However, the application of computers to cryptography in general dates back to the 1940s and Bletchley Park, where the Colossus computer was used to break the encryption used by German High Command during World War II. The use of computers to encrypt, however, came later. In particular, until the development of the integrated circuit, of which the first was produced in 1960, computers were impractical for encryption, since, in comparison to the portable form factor of the Enigma machine, computers of the era took the space of an entire building. It was only with the development of the microcomputer that computer encryption became feasible, outside of niche applications. The development of the World Wide Web lead to the need for consumers to have access to encryption, as online shopping became prevalent. The key concerns for consumers were security and speed. This led to the eventual inclusion of the key algorithms into processors as a way of both increasing speed and security. == Implementations == === In the instruction set === ==== x86 ==== The X86 architecture, as a CISC (Complex Instruction Set Computer) Architecture, typically implements complex algorithms in hardware. Cryptographic algorithms are no exception. The x86 architecture implements significant components of the AES (Advanced Encryption Standard) algorithm, which can be used by the NSA for Top Secret information. The architecture also includes support for the SHA Hashing Algorithms through the Intel SHA extensions. Whereas AES is a cipher, which is useful for encrypting documents, hashing is used for verification, such as of passwords (see PBKDF2). ==== ARM ==== ARM processors can optionally support Security Extensions. Although ARM is a RISC (Reduced Instruction Set Computer) architecture, there are several optional extensions specified by ARM Holdings. === As a coprocessor === IBM 4758 – The predecessor to the IBM 4764. This includes its own specialised processor, memory and a Random Number Generator. IBM 4764 and IBM 4765, identical except for the connection used. The former uses PCI-X, while the latter uses PCI-e. Both are peripheral devices that plug into the motherboard. === Proliferation === Advanced Micro Devices (AMD) processors are also x86 devices, and have supported the AES instructions since the 2011 Bulldozer processor iteration. Due to the existence of encryption instructions on modern processors provided by both Intel and AMD, the instructions are present on most modern computers. They also exist on many tablets and smartphones due to their implementation in ARM processors. == Advantages == Implementing cryptography in hardware means that part of the processor is dedicated to the task. This can lead to a large increase in speed. In particular, modern processor architectures that support pipelining can often perform other instructions concurrently with the execution of the encryption instruction. Furthermore, hardware can have methods of protecting data from software. Consequently, even if the operating system is compromised, the data may still be secure (see Software Guard Extensions). == Disadvantages == If, however, the hardware implementation is compromised, major issues arise. Malicious software can retrieve the data from the (supposedly) secure hardware – a large class of method used is the timing attack. This is far more problematic to solve than a software bug, even within the operating system. Microsoft regularly deals with security issues through Windows Update. Similarly, regular security updates are released for Mac OS X and Linux, as well as mobile operating systems like iOS, Android, and Windows Phone. However, hardware is a different issue. Sometimes, the issue will be fixable through updates to the processor's microcode (a low level type of software). However, other issues may only be resolvable through replacing the hardware, or a workaround in the operating system which mitigates the performance benefit of the hardware implementation, such as in the Spectre exploit.

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